1. Field
Embodiments of the present invention relate to a display device and a driving method thereof.
2. Description of the Related Art
Various kinds of display devices that are capable of reducing negative characteristics of cathode ray tubes (CRT), such as their heavy weight and large size, have been developed in recent years. Such display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), and organic light emitting diode (OLED) displays.
An OLED display uses an OLED in which luminance is controlled by a current or a voltage. The organic light emitting diode includes an anode layer and a cathode layer generating an electric field, and an organic light emitting material emitting light due to the electric field.
In general, OLED displays are classified into either passive matrix OLED (PMOLED) displays and active matrix OLED (AMOLED) displays, according to a driving mode of the display. Among the categories of OLED displays, the active matrix OLED display, which emits light selected for each unit pixel in terms of resolution, contrast, and operation speed have become mainstream.
One pixel of the active matrix OLED display includes the OLED, a driving transistor that controls a current amount that is supplied to the OLED, and a switching transistor that transmits the data voltage that controls the light emitting amount of the OLED to the driving transistor.
An OLED display additionally may include a power source voltage wire for supplying a current to an OLED, and a data voltage wire. The power source voltage wire and the data voltage wire are arranged in parallel in a column direction.
Display devices which have recently been being developed have a design space that is reduced to improve the resolution. A line width of wires and spaces between the wires may need to be decreased by as much as the design space reduction. As the spaces between the wires are reduced, short-circuit errors between the wires caused by particles may increase. For example, the power source voltage wire and the data voltage wire may be adjacently arranged in parallel, and thus the short-circuit errors may be easily generated.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.